Since a group III-V compound semiconductor containing nitrogen (a group III nitride semiconductor) has a band gap corresponding to energy of light having a wavelength in a range from infrared to ultraviolet, it is useful as a material for a light emitting element emitting light having a wavelength in a range from infrared to ultraviolet or for a light receiving element receiving light having a wavelength in that range.
In addition, since a group III nitride semiconductor has strong bond between atoms forming the group III nitride semiconductor, a high breakdown voltage, and a high saturated electron velocity, it is useful also as a material for electronic devices such as transistors having resistance to high temperature, achieving high output, and adapted to a high frequency.
Moreover, the group III nitride semiconductor has attracted attention also as a material which hardly adversely affects an environment and is easy to handle.
In order to fabricate a practical nitride semiconductor element by using the group III nitride semiconductor which is an excellent material as described above, a group III nitride semiconductor layer formed of thin films of the group III nitride semiconductor should be stacked on a prescribed substrate to thereby form a prescribed element structure.
Here, a substrate made of a group III nitride semiconductor having a lattice constant and a coefficient of thermal expansion allowing direct growth of the group III nitride semiconductor on the substrate is most suitably used as a substrate, and for example, a gallium nitride (GaN) substrate or the like is preferably used as a substrate made of the group III nitride semiconductor.
Currently, however, a GaN substrate is not practical because it has such a small dimension as a diameter of 2 inches or smaller and it is also very expensive.
Therefore, under present circumstances, a sapphire substrate, a silicon carbide (SiC) substrate, or the like, which is great in difference in lattice constant and coefficient of thermal expansion from the group III nitride semiconductor, is used as a substrate for fabricating a nitride semiconductor element.
The sapphire substrate and GaN which is a representative group III nitride semiconductor are different from each other in lattice constant by approximately 16%. In addition, the SiC substrate and GaN are different from each other in lattice constant by approximately 6%. If such a great difference in lattice constant is present between a substrate and a group III nitride semiconductor grown thereon, it is generally difficult to epitaxially grow a crystal made of the group III nitride semiconductor on the substrate. For example, when GaN crystal is epitaxially grown directly on a sapphire substrate, three-dimensional growth of GaN crystal is inevitable and GaN crystal having a flat surface cannot be obtained.
Then, what is called a buffer layer for eliminating a difference in lattice constant between a substrate and a group III nitride semiconductor is generally formed between the substrate and the group III nitride semiconductor.
For example, PTL 1 (Japanese Patent No. 3026087) describes a method of growing a group III nitride semiconductor composed of AlxGa1-xN after a buffer layer composed of AlN is formed on a sapphire substrate with MOVPE.
With the method described in PTL 1, however, it has been difficult to obtain a buffer layer composed of AlN and having a flat surface with good reproducibility. This may be because, in forming a buffer layer composed of AlN with MOVPE, a trimethylaluminum (TMA) gas and an ammonia (NH3) gas used as source material gases are likely to react to each other in a vapor phase.
Therefore, with the method described in PTL 1, it has been difficult to grow a group III nitride semiconductor composed of high-quality AlxGa1-xN, having a flat surface, and having low defect density on a buffer layer composed of AlN with good reproducibility.
For example, PTL 2 (Japanese Patent Publication No. 5-86646) discloses a method of forming on a sapphire substrate, an AlxGa1-xN (0<x≦1) buffer layer with high-frequency sputtering in which a DC bias is applied.
The group III nitride semiconductor formed on the AlxGa1-xN (0<x≦1) buffer layer with the method described in PTL 2, however, did not have excellent crystallinity as described in paragraph [0004] of PTL 3 and paragraph [0004] of PTL 4.
Then, PTL 3 (Japanese Patent No. 3440873) has proposed a method of subjecting a buffer layer made of a group III nitride semiconductor formed with DC magnetron sputtering to heat treatment in an atmosphere of a gas mixture of a hydrogen gas and an ammonia gas. In addition, PTL 4 (Japanese Patent No. 3700492) has proposed a method of forming a buffer layer made of a group III nitride semiconductor and having a film thickness not smaller than 50 angstroms and not greater than 3000 angstroms with DC magnetron sputtering on a sapphire substrate of which temperature was raised to 400° C. or higher.
Moreover, PTL 5 (Japanese Patent Laying-Open No. 2008-34444) has proposed a method of forming a buffer layer composed of AlN column crystals with high-frequency sputtering on a sapphire substrate heated to 750° C.
Furthermore, PTL 6 (Japanese Patent No. 3950471) describes providing projecting and recessed structures at a substrate surface in order to grow a group III nitride semiconductor having few crystal defects and laterally growing the group III nitride semiconductor thereon.
Further, PTL 7 (Japanese Patent Laying-Open No. 2006-352084) describes in paragraphs [0043] and [0044], growth in two stages including the step of growing a GaN layer on a substrate provided with projecting and recessed structures that “a GaN layer 12 is grown in such a way as to form an isosceles triangle in section that has . . . a facet inclined relative to the main surface of the sapphire substrate 11,” and the step that “next, when the growth is continued while setting the conditions where lateral growth is predominant . . . GaN layer 12 is laterally grown so that the surface of the GaN layer 12 creates a flat surface in parallel to the main surface of the sapphire substrate 11.”    PTL 1: Japanese Patent No. 3026087    PTL 2: Japanese Patent Publication No. 5-86646    PTL 3: Japanese Patent No. 3440873    PTL 4: Japanese Patent No. 3700492    PTL 5: Japanese Patent Laying-Open No. 2008-34444    PTL 6: Japanese Patent No. 3950471    PTL 7: Japanese Patent Laying-Open No. 2006-352084